Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

Tenstorrent is building next-generation CPU and AI silicon. As a Debug Architect, you will define and scale debug and trace capabilities across our product lines, enabling both internal teams and external users to validate performance, diagnose issues, and optimize workloads.

This role is hybrid, based out of Toronto, Canada.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

Experienced in hardware debug for CPU, SoC, or ASIC systems, including bring-up and post-silicon environments.
Strong understanding of processor architecture and microarchitecture across RISC-V, x86, or ARM.
Familiar with debug, profiling, and trace methodologies, including industry standards such as iJTAG.
Comfortable working across hardware and software boundaries, including firmware and driver interaction.
Proficient in HDL such as Verilog or VHDL and programming tools including Python and Git.

What We Need

Define and implement scalable debug architecture across multiple CPU and AI product lines.
Design and validate hardware debug and trace features during development and verification.
Prove debug capabilities during silicon development and ensure readiness for production use.
Support silicon bring-up and establish robust post-silicon debug infrastructure.
Collaborate with hardware, software, and deployment teams to enable efficient debugging and performance analysis.

What You Will Learn

How debug and trace systems are architected across modern CPU and AI silicon.
How silicon bring-up and post-silicon validation workflows operate at scale.
How hardware and software interfaces enable effective system-level debugging.
How performance and quality are validated through robust debug infrastructure.
How large-scale systems teams collaborate to deliver production-ready silicon.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

Debug Architect

Tenstorrent

Job Description

Who You Are

What We Need

What You Will Learn

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