Layout Engineer-DPG-LPDDR

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Join our ambitious team in Hyderabad as a Senior Analog Layout Engineer-DPG-LPDDR and contribute to our mission of transforming information into intelligence. You will be responsible for the layout and integration of key analog blocks, ensuring outstanding performance and reliability across advanced process technologies.

• Take responsibility for the layout and integration of essential analog blocks, guaranteeing low-noise performance, high reliability, and strong operation across PVT corners for advanced process technologies.
• Apply strong device physics expertise to drive high-quality layout implementation, including transistor matching strategies, well and substrate engineering, parasitic optimization, and EM/ESD reliability considerations.
• Complete and review high-speed layout techniques for sensitive analog and mixed-signal paths, focusing on impedance control, skew matching, shielding, isolation, and crosstalk mitigation.
• Work closely with circuit designers and architects to enable layout-aware build, proactively identifying and resolving parasitic, noise, and performance risks early in the design cycle.
• Lead post-layout optimization and sign-off activities, including DRC/LVS, EM/IR analysis, and correlation of post-layout simulations with silicon or lab data.
• Provide technical mentorship and conduct design reviews for complex blocks, contributing to guidelines, quality improvement, and first-silicon success.
• Leverage AI/ML knowledge as a benefit to support target="_blank">hrsupport_india@micron.com

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