Job Details:

Job Description:

As an integral part of Intel's new Integrated Device Manufacturer 2.0 (IDM2.0) strategy, we are establishing Foundry Services (FS), a fully vertical, stand-alone foundry business, reporting directly to the CEO. Foundry Services will be a world-class foundry business and major provider of US and European based capacity to serve customers globally.

Foundry Services will be differentiated from other foundries with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe, and a world-class IP portfolio that customers can choose from, including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP's, along with Arm and RISC-V ecosystem IPs. Foundry Services will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry standard design packages.

The Role and Impact

As a Silicon Packaging Design Engineer, you will play a critical role in the development of advanced substrate designs that drive Intel's innovation and technological leadership. This position offers a unique opportunity to contribute to cutting-edge technologies by managing the end-to-end development process of substrate designs, from concept to tapeout. You will collaborate with silicon and hardware teams to optimize design performance, cost efficiency, and manufacturability, ensuring Intel remains at the forefront of high-performance applications. Your contributions will directly impact Intel's ability to deliver world-class solutions that address global challenges in computing.

Key Responsibilities

• Drive the physical layout and routing of package designs, ensuring alignment with silicon, package, and board performance requirements.
• Conduct substrate fit and routing studies to establish design, performance, and cost tradeoffs.
• Define and implement substrate design rules, conducting internal and external reviews to maintain quality standards.
• Analyze data, resolve Design Rule Checks (DRCs), and optimize designs for manufacturability and performance.
• Collaborate with cross-functional teams to optimize pinout and silicon-package-board interactions.
• Complete documentation and collateral into the product lifecycle management system of record.

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. This position is not eligible for Intel immigration sponsorship

Minimum Qualifications:

• Bachelor's or Master's degree in Electrical, Mechanical Engineering or related field with 1 year of experience.
• Experience mentioned above should be in the following areas:
  • Package design tools such as Siemens Xpedition, Cadence Allegro Package Design, AutoCAD, or SolidWorks.
  • Physical layout aspects of substrate design, including custom layouts, floor plans, or schematic layout conversions.
  • Microelectronic package or PCB physical layout design and the associated manufacturing processes.

Preferred Qualifications

• Experience in microelectronic package substrate design, package I/O routing, or technology development.
• Familiarity with microelectronic package electrical modeling and simulation tools such as PowerDC, HyperLynx, Q3D, and HFSS.
• Analytical and problem-solving skills, including debugging and providing innovative solutions.
• Experience with scripting using Python, VB, C, or similar languages.

Join Intel and contribute to shaping the future of technology. Be a part of a dynamic team committed to delivering innovative solutions that address the needs of a rapidly evolving world. Apply today to take the next step in your career.

Job Type:

College Grad

Shift:

Shift 1 (United States of America)

Primary Location:

US, Arizona, Phoenix

Additional Locations:

US, Oregon, Hillsboro

Business group:

Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $105,650.00-172,860.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.