Sr. CPU DV Engineer

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As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most >

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Job Description:

Role Overview

We are seeking a highly skilled Verification Engineer with 4+ years of experience for the verification of complex CPU core microarchitecture. The candidate will carry DV strategy, architecture validation, and closure for high-performance processors, ensuring functional correctness, performance, and quality at silicon level.

Key Responsibilities

• CPU Core Verification

• Own end-to-end verification of CPU core components (Fetch, Decode, Execute, Memory, Pipeline, Cache, MMU)

• Validate microarchitectural features such as:

• Out-of-order execution

• Branch prediction

• Cache coherency

• Virtual memory & paging

• RAS and Fusa

• Develop test plans from architecture specifications and ensure full coverage closure

Verification Methodology & Execution

• Lead verification using SystemVerilog / UVM

Develop:

• Testbenches

• Constrained-random tests

• Scoreboards and checkers

• Coverage models (functional + code)

• Drive regressions and debug complex failures across simulation/emulation platforms

Architecture & Feature Validation

• Work closely with Architecture & Design teams to:

• Understand ISA behavior (e.g., ARM ISA, RISC-V, or x86)

• Validate corner cases, exceptions, interrupts

• Perform ISA-level validation and compliance testing

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in: