Sr Principal Engineer, CPU Design

We’re seeking a CPU RTL design engineer with prior experience in creating structural RTL for one of the following: CPU, GPU, DSP, Interconnects, memory controllers or compute accelerators.

As part of our team, you’ll have the opportunity to take ownership of CPU functional blocks and implement RTL, and work with verification and physical design engineers to ensure adherence to functional and physical project requirements. You’ll also mentor junior engineers in the art of RTL design.

Our flexible hybrid work model—three days in the office, two remote—supports both in-person collaboration/mentoring and focused development time.

Join us and put your skills, insight, and passion to work to redefine what’s possible

Essential Responsibilities:

As a CPU design engineer you own or participate in the following:

· RTL design of one or many functional blocks based on the microarchitectural specification. Ownership includes the RTL design, implementation and convergence of the block to project requirements (performance, timing, power, area, schedule)

· Support of the verification team for test bench development, test plan development and test content development, including performance verification

· Work with physical design teams, and design for testability teams to implement and converge physical design and testability

Other Responsibilities:

Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

RequiredQualifications:

· Minimum BS and 20+ years of relevant industry experience

· Experience in structural data path and/or control logic design

· Experience in at least one area of CPU microarchitecture

· Experience with Verilog, System Verilog, or VHDL

· Demonstrated debug capabilities with commercial simulators and wave viewing tools

· Experience in working with physical design team on convergence for PPA

· Good verbal and written communication skills to interface with performance modeling, verification and physical design team

Preferred Qualifications:

· Experience with low power design techniques

· Experience using scripting languages and regular expressions

· Programming experience with assembly, C, or C++

Expected Salary Range

$171,000.00 - $296,000.00

The exact Salary will be determined based on qualifications, experience and location.