SSD Qualification Engineer - PCIe Validation

THE ROLE

As a PCIe Validation Engineer (IC) on the Drive Qualification team, you will design and execute PCIefocused validation and debug for Everpure SSDs. Youll own link and protocol test coverage, develop automated test suites and frameworks using PCIe analyzers and exercisers, and drive issues from first detection through root cause and closure. This is a handson role with deep involvement in test development, lab debug, and crossfunctional collaboration.

WHAT YOU'LL DO

• Test Plans : Define PCIe test plans covering link training, lane width/speed changes, resets, hotplug, surprise removal, error injection, powermanagement states, and recovery behaviour.
• Execute PCIe validation Execute Gen4/Gen5/Gen6 link and protocol tests across different platforms and system configurations.Validate SSD behaviour under abnormal and corner conditions & provide periodic PCIe validation readouts for critical program milestones.
• Develop PCIe test content & frameworks : Develop and maintain automated PCIe test suites, Integrate PCIe analyzers, exercisers, and Quarchclass tools into test frameworks to enable reproducible, automated scenarios.
• Collaborate: Triage failures from regression, bringup, and customer scenarios; correlate PCIe traces, NVMe/OCP logs, and system logs. Partner with FW, HW, and systems teams to rootcause and verify fixes, and roll improvements back into the test suite.
• PCIe tools: Leverage PCIe analyzers/exercisers for trace capture, error injection. Use oscilloscopes, logic analyzers, BERTs, and related tools (as needed) to support signal and protocollevel debug.
• Test Roadmap & leadership: Lead coverage improvements based on lessons learned, standardize PCIe test APIs, logs, and reporting for reuse across products & share PCIe debug and test BKMs
• We are primarily an in-office environment and therefore, you will be expected to work from the Santa Clara, CA office in compliance with Everpure's policies, unless you are on PTO, or work travel, or other approved leave.

WHAT YOU BRING

• 6+ years experience in SSD, storage, or PCIecentric validation / bringup (or equivalent embedded / highspeed I/O domain).
• Strong understanding of PCIe fundamentals:
• Handson experience using PCIe analyzers/exercisers (e.g., Teledyne/LeCroy, Keysight, or similar) for trace capture and debug.
• Comfortable with Python (or similar) for test and tooling development; able to work effectively in Linuxbased validation environments.
• Experience with CI / regression infrastructure (e.g., Jenkins, Gitbased workflows) for largescale test execution.
• Strong debug skills across HW/FW/system boundaries; able to go from symptom to hypothesis to validated root cause.
• Clear written and verbal communication, with the ability to present findings, tradeoffs, and recommendations to engineering and program teams.
• Highly selfmotivated, detailoriented, and comfortable operating in a fastpaced development environment.

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